1. Field of the Invention
This invention relates to the field of solid state devices for information storage, and in particular to a method and structure for storing multilevel logic values in a read-only memory.
2. Description of the Related Art
Memory devices store and retrieve large quantities of digital data at electronic speeds. Early digital computers used magnetic cores as the devices in fast-access memories. With the introduction of semiconductor memory chips in the late 1960s, magnetic cores began to be replaced by integrated circuits which implement a much higher-density memory function. This not only increased the performance capabilities of the memory, but also drastically decreased its cost. By the end of the 1970s, magnetic core memories had been completely displaced as high-speed memory devices.
Memory capacities in digital systems are commonly expressed in terms of bits (binary digits), since a separate device or circuit is used to store each bit of data. Each storage element is referred to as a cell. Memory capacities are also sometimes stated in terms of bytes (8 or 9 bits) or words (arbitrarily defined, but commonly 16-80 bits). Every bit, byte, or word is stored in a particular location, identified by a unique numeric address. Only a single bit, byte, or word is stored or retrieved during each cycle of memory operation.
The units of memory storage capacity are typically kilobits and megabits (or kilobytes and megabytes). Since memory addressing is based on binary codes, capacities that are integral powers of 2 are typically used. As a result, a memory device with a 1-kbit capacity can actually store 1024 bits, and a 64-kbyte device can store 65,536 bytes.
In digital computers, the number of memory bits is usually 100 to 1000 times greater than the number of logic gates, which implies that the memory cost per bit must be kept very low. In addition, it is desirable for the memory devices to be as small as possible (since this will allow the highest density of cells on a chip), to operate at a high speed, to have a small power consumption, and to operate reliably. To achieve this end, memory cells are designed to be as simple and compact as possible. Typically, the cell itself is not capable of outputting digital data in an electrical form compatible with the requirements of the remainder of the system. To restore the electrical characteristics of the cell's outputted data to adequate values, properly designed peripheral circuits (e.g. sense amplifiers, memory registers, and output drivers) are necessary. These circuits are designed to be shared by many memory cells. The trade-off thus made is that of a less robust output signal from the cell, in exchange for a simple, compact memory cell design.
The most flexible digital memories are those that allow for data storage (hereafter, writing) as well as data retrieval (hereafter, reading). Memories in which both of these functions can be rapidly and easily performed, and whose cells can be accessed in random order (independent of their physical locations), are referred to as random-access memories (RAMs). Read-only memories (ROMs) are those in which only the read operation can be performed rapidly. Entering data into a ROM is referred to as programming the ROM. This operation is much slower than the writing operation used in RAMs.
The storage cells in a typical semiconductor memory are arranged in an array consisting of horizontal rows and vertical columns. Each cell shares electrical connections with all the other cells in its row, and column. The horizontal lines connected to all the cells in the row are called word lines, and the vertical lines (along which data flows into and out of the cells) are referred to as data lines. Each cell therefore has a unique memory location, or address, which can be accessed at random through the selection of the appropriate word and data line. Some memories are designed so that all the cells in a row are accessed simultaneously. This array configuration of semiconductor memories lends itself well to the regular structured designs which are favored in VLSI.
There are a number of important circuits on the periphery of the array. One such peripheral circuit is the address decoder. This circuit allows a large number of word and data lines to be accessed with the fewest number of address lines. Address decoders for this purpose have 2.sup.n output lines, with a different one selected for each different n-bit input code. In later generations of memory circuits, address multiplexing was integrated on some memory chips to reduce the number of address pins by half.
Another peripheral circuit is the read/write control circuitry. This circuitry determines whether data is to be written into or read from the memory. Because such circuits also amplify and buffer the data signals retrieved from the cells, one of the important circuits in this subsystem is the sense amplifier. In dynamic memories that need periodic data refreshing, refresh circuitry may also be provided.
Recently, additional peripheral circuits have been added to the basic memory organization structure. These circuits serve mainly to improve the manufacturability and testability of the chips. Those designed to increase manufacturability include redundancy circuits and error-correction circuits. Redundancy circuits allow some defective chips to be salvaged, while self-testing circuits reduce testing time. Error-detection and correction techniques involve the addition of parity bits to allow the system to detect bad data, accomplish parity checking, and in some cases provide correction of the data errors.
Most RAMs have only one input-data lead and one output-data lead (or a single combined input/output lead). Writing into and reading from such RAMs is done one bit at a time. Other RAMs have a number of input- and output-data leads, with the number determined by the word length of the system's data bus. ROMs, on the other hand, are typically organized so that the number of output-data leads is the same as the number of lines on the data bus. ROMs are programmed word by word and are read from in the same manner.
In semiconductor RAMs, information is stored on each cell either through the charging of a capacitor or the setting of the state of a bi-stable flip-flop circuit. With either method, the information on the cell is destroyed if the power is interrupted. Such memories are therefore referred to as volatile memories. When the charge on a capacitor is used to store data in a semiconductor-RAM cell, the charge needs to be periodically refreshed, since leakage currents will remove it in a few milliseconds. Hence, volatile memories based on this storage mechanism are known as dynamic RAMs, or DRAMs.
If the data is stored (written) by setting the state of a flip-flop, it will be retained as long as power is connected to the cell (and flip-flop is not reset by another write signal). RAMs fabricated with such cells are known as static RAMs, or SRAMs. Volatile RAMs can be treated as non-volatile if they are provided with a battery backup. Some DRAM and SRAM chips are even packaged together with a battery to facilitate implementation of this approach.
It is often desirable to use memory devices that will retain information even when the power is interrupted. Magnetic media offer such nonvolatile-memory storage. In addition, a variety of semiconductor memories have been developed with this characteristic. At present, virtually all such nonvolatile memories are ROMs. While data can be entered into these memories, the programming procedure varies from one type of ROM to the other.
The first group of nonvolatile memories consists of those ROMs in which data is entered during manufacturing, and cannot be subsequently altered by the user. These devices are known as masked ROMs (or simply ROMs). The next category consists of memories whose data can be entered by the user (user-programmable ROMs). In the first example of this type, known as a programmable ROM, or PROM, data can be entered into the device only once. In the remaining ROM types, data can be erased as well as entered. In one class of erasable ROMs, the cells must be exposed to a strong ultraviolet light in order for the data to be erased. These ROMs are called erasable-programmable ROMs, or EPROMs. In the final type, data can be electrically erased as well as entered into the device; these are referred to as EEPROMs. The time needed to enter data into both EPROMs and EEPROMs is much longer than the time required for the write operation in a RAM. As a result, none of the ROM types can at present be classified as fully functional RAM devices.
Many variations on the basic memory organization architecture have been developed, including video RAMs and multiport RAMs. Architectures which combine memory and logic circuits on the same chip are becoming increasingly popular. But the primary trends in semiconductor memory development are to increase the storage density and to reduce the cost per bit. It would therefore be desirable to have a method and structure for further increasing the bit storage density and reducing the cost per bit.